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d a t a sh eet preliminary speci?cation file under integrated circuits, ic17 2001 jun 19 integrated circuits PCF26100 bluetooth adapter ic
2001 jun 19 2 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 contents 1 features 2 general description 3 ordering information 4 block diagram 5 pinning information 5.1 pinning 5.2 pin description 6 functional description 6.1 PCF26100 overview 6.2 bluerf pin mapping 6.3 timing 6.4 serial interface 6.5 registers 7 reference documents 8 limiting values 9 dc characteristics 10 ac characteristics 11 applications 12 package outline 13 soldering 13.1 introduction to soldering surface mount packages 13.2 reflow soldering 13.3 wave soldering 13.4 manual soldering 13.5 suitability of surface mount ic packages for wave and reflow soldering methods 14 data sheet status 15 definitions 16 disclaimers
2001 jun 19 3 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 1 features the PCF26100 performs the following functions: power-on reset (reset) system clock generation for baseband controller reference clock generation for the uaa3558 low-power clock generation for baseband controller transmit clock generation for baseband controller (1 mhz) serial interface conversion between jtag and 3-wire s-bus timing control generation for the uaa3558 transmit data conversion from digital-to-analog gaussian shaped rssi conversion from analog-to-digital and access through serial jtag interface transmit pa control information from jtag interface digital-to-analog conversion provides radio id through the serial jtag interface system clock oscillator trimming. 2 general description the PCF26100 is a mixed signal based adapter device for wireless bluetooth systems. the device adapts the baseband interface of the philips uaa3558 radio to the philips pcf26002 and pcf26003 baseband controller devices and also to the bluerf jtag unidirectional rxmode 2. the adapter is provided as a low risk solution to a working bluetooth system based on existing components. the adapter asic implementation incorporates, as much as possible, features to come to a complete bluetooth system, meeting the bluetooth rf requirements. from the bluetooth system point of view the PCF26100 is a transparent adaptation device between the baseband controller and the uaa3558 radio. 3 ordering information type number package name description version PCF26100et tfbga48 plastic thin ?ne-pitch ball grid array package; 48 balls; 5 5 0.8 mm sot641-1
2001 jun 19 4 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 4 block diagram handbook, full pagewidth mgt751 synth_on px_on reset and por timing control system clock mclk oscillator 2.048 mhz divider reference clock t_sw mux sys_clk_req sys_clk dac adc 3-wire interface rx sample rx/tx mux gfsk filter id rssi xotrim pacntl channel channel conversion channel static rx_data tx_data serial interface si_cms si_clk si_cdo si_cdi por por_ext vio_power transmit data clock divider timing settings low power clock divider lpo_clk tx_clk s_data s_en pacntl dac t_gfsk t_sw ref_clk rssi r_data slcctr s_clk test scantest test_en anatest shiftctrl xin v ss(i/o) v dd(i/o) v ss(osc) v dd(osc) v ssa v dda v ss v dd ubmode xout PCF26100 fig.1 block diagram.
2001 jun 19 5 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 5 pinning information 5.1 pinning a b c d e f h g 2468 13 PCF26100et 57 mbl245 fig.2 pin configuration.
2001 jun 19 6 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 5.2 pin description table 1 pin description for the tfabga48 package symbol ball description i/o signal type source por a1 reset output to baseband controller o 1 cmos output bb shiftctrl c2 test mode i non-inverting cmos input with pull-down test vio_power b1 power-on reset reference i schmitt-trigger input v dd c1 core supply voltage p core power lpo_clk d1 3.2 khz low-power clock to baseband controller o 1 cmos output bb px_on e1 receive packet synchronization correlation achieved i non-inverting cmos input bb v ss(i/o) e2 i/o ground supply p i/o ground sys_clk_req f1 system clock control input from baseband controller i non-inverting cmos input bb sys_clk g1 controlled system clock output to baseband controller o3 cmos output bb tx_clk f2 transmit data clock output to baseband controller o 1 cmos output bb v ss g2 core ground supply p core ground rx_data h1 receive data output to baseband controller o 1 cmos output bb anatest g3 test mode i non-inverting cmos input with pull-down test v ss(osc) h2 oscillator ground supply p oscillator ground xout h3 oscillator output o oscillator output misc xin h4 oscillator input i oscillator input misc v dd(osc) h5 oscillator supply voltage p oscillator power v dd(i/o) g5 i/o supply voltage p i/o power por_ext h6 reset and por on control input i non-inverting cmos input host test_en h7 test mode i non-inverting cmos input with pull-down test slcctr g6 dc offset control to uaa3558 o 1 cmos output v ss(i/o) g7 i/o ground supply p i/o ground s_en h8 serial interface and timing control output to uaa3558 o 1 cmos output uaa s_clk f7 serial interface clock output to uaa3558 o 1 cmos output uaa s_data g8 serial interface data output to uaa3558 o 1 cmos output uaa ref_clk f8 reference clock output to uaa3558 o 3 cmos output uaa v ssa e8, d8 analog ground supply p analog ground rssi d7 rssi analog input from uaa3558 i analog input uaa t_gfsk c8 analog transmit data output to uaa3558 o analog output uaa
2001 jun 19 7 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... pacntl b8 analog pa control output to external pa o analog output misc v dda c7 analog supply voltage p analog power r_data b7 receive data input from uaa3558 (uaa3558 output = 0 to 2.2 v) i non-inverting cmos input uaa t_sw a8 transmit switch timing control to uaa3558 multiplexed with 2.048 mhz clock output o3 cmos output uaa scantest b6 test mode i non-inverting cmos input with pull-down test tx_data a7 transmit data i non-inverting cmos input bb v ss(i/o) a6 i/o ground supply p i/o ground synth_on a5 timing control input from baseband controller i non-inverting cmos input bb ubmode a4 unidirectional/bidirectional mode selection i non-inverting cmos input misc v dd(i/o) b4 i/o supply voltage p i/o power si_clk a3 serial interface clock input from baseband controller i non-inverting cmos input bb si_cms a2 serial interface mode select input from baseband controller i non-inverting cmos input bb si_cdi b3 serial interface data input from baseband controller i non-inverting cmos input bb si_cdo b2 serial interface data output to baseband controller o 1 cmos output bb symbol ball description i/o signal type source
2001 jun 19 8 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6 functional description 6.1 PCF26100 overview the adapter features a power-on reset which is used to reset the adapter logic. there is also a por_ext signal which is used for controlling the reset of the PCF26100 within the application. the system clock for the application is generated by the PCF26100. the system clock is then provided to the baseband sys_clk and the radio ref_clk. both the sys_clk and ref_clk clocks are controlled within the PCF26100. from the system clock a low-power 3.2 khz clock lpo_clk is generated. from the PCF26100 a 1 mhz tx_clk is generated to be used in the baseband controller to clock out the transmit data on tx_data. the serial interface to the baseband controller is a jtag interface. this interface is used to initialize and control the PCF26100 and subsequently the radio. the channel information received from the jtag interface is converted and forwarded to the radio 3-wire s-bus interface. the timing control signals to the uaa3558 radio are generated in the PCF26100. for this a minimum number of reference timing signals from the baseband controller are used. the exact timing of the control signals is programmable in the PCF26100. the PCF26100 converts the digital transmit data from the baseband controller to analog gaussian shaped transmit data to the radio. the analog rssi from the radio is converted to digital and made available to the baseband controller via the jtag interface. the digital power amplifier control information communicated from the baseband controller to the PCF26100 is converted to an analog control voltage for the radio. the PCF26100 provides an identification number, which can be read by the baseband controller through the jtag interface. for frequency compensation and tuning, the PCF26100 provides a tuning capability on the system oscillator. 6.2 bluerf pin mapping table 2 adapter and bluerf unidirectional pin mapping. adapter to baseband pin name bluerf pin name jtag unidirectional rxmode 2 por_ext bnpwr por not applicable lpo_clk not applicable sys_clk not applicable sys_clk_req bxtlen tx_clk brclk tx_data btxd/bdata1 rx_data brxd synth_on bsen px_on bpktctl/bdata2 si_cms bnden si_clk bdclk si_cdi bmosi/bddata si_cdo bmiso vio_power not applicable
2001 jun 19 9 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.3 timing the timing for the radio is generated in the PCF26100 using a minimal number of baseband signals. the channel programming is received from the jtag serial interface. the synth_on signal is used to determine the start and end of the packet. the radio slcctr signals is also controlled with px_on. handbook, full pagewidth t 17 t 5 t 6 t 14 t 10 t 9 t 7 t 11 t 12 t 2 t 6 t 3 t 5 t 1 t 1 t 2 t 10 t 3 t 13 t 4 t 12 t 18 rx packet tx packet mgt756 t 9 t 8 r_data t_gfsk ref_clk s_xxx s_en jtag px_on synth_on tx_data t_sw rssi slcctr rx_data tx_clk fig.3 detailed timing diagram.
2001 jun 19 10 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 table 3 adapter timing parameters parameter description value unit t 1 synth_on rising edge to 3-wire serial data 0.35 m s t 2 synth_on rising edge to refclk start s_en start m s t 3 s_en falling edge to refclk stop delay 2 m s t 4 s_en falling edge to rssi measurement rssi_start m s t 5 synth_on rising edge to s_en rising edge s_en start m s t 6 s_en width s_en width m s t 7 synth_on falling edge to s_en pulse rising edge s_en pulse start m s t 8 synth_on falling edge to s_en pulse rising edge s_en pulse start m s t 9 s_en pulse width 2 m s t 10 synth_on rising edge to t_gfsk dc bias and txclk enable gfsk_dc_bias start m s t 11 tx_data digital in to t_gfsk analog out delay 14 13 mhz cycles t 12 s_en pulse falling edge to t_gfsk low and txclk disable 0 m s t 13 s_en falling edge to slcctr rising edge slcctr start m s t 14 px_on rising edge to slcctr falling edge 0 m s t 17 synth_on rising edge to t_sw rising edge t_sw start m s t 18 s_en pulse falling edge to t_sw falling edge 0 m s 6.3.1 t_gfsk the t_gfsk data output has 3 phases: 1. idle phase 2. dcbias phase 3. txdata phase. the idle phase is used outside transmit packets. in this phase the t_gfsk output state is defined by the gfsk float bit in the enable register. if the gfsk float bit is set to a logic 0, the t_gfsk output is pulled to ground; if set to a logic 1 the t_gfsk output is floating. the dcbias phase is used during the transmit slot as start-up phase before the transmit data. the dcbias phase is active gfsk_dc_bias_start delay following the s_en rising edge until the first transmit data bit on tx_data. during this phase a dc bias is generated by the gfsk filter, which is achieved by selecting the gfsk table mid-value as the output of the gfsk filter. the txdata phase is used when txdata is present. in this phase the tx_data is fed into the gfsk filter. the presence of txdata is determined by detecting the first txdata edge. the end of the txdata is detected by the end of packet from the baseband controller. to not lose txdata information in the t_gfsk output, due to the data detection, the data from the gfsk input is delayed with 1-bit. the t_gfsk output requires an external low-pass filter. the reference voltage for the t_gfsk comes directly from the v dda power supply. any variation on v dda has a direct relation to a variation in the t_gfsk levels. the v dda power supply should be provided from a voltage reference. the tx_clk output is activated during the dc_bias phase and the txdata phase.
2001 jun 19 11 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.3.2 r eset the PCF26100 is reset with a power-on reset using the vio_power signal. this will reset all registers and put the device into a known state. the por_ext reset signal will also reset the device and put it in the same state as the power-on reset. however, por_ext is intended to be used for a reset from a host. following the power-on reset or a reset by por_ext, the system oscillator is started and the sys_clk output is activated (enabled). the sys_clk output can be controlled by the sys_clk_req signal but only if the rdy bit in the control register has been set to logic 1. the function of sys_clk_req has 2 phases: 1. after reset, sys_clk_req is not taken into account for the generation of sys_clk. after reset the 13 mhz system clock is enabled on sys_clk. 2. once the rdy bit is set to logic 1, the 13 mhz clock on the sys_clk is controlled with sys_clk_req. the sys_clk_req signal will not control or disable the oscillator. the lpo_clk output is only controlled by the por_ext signal which also controls the por output. the por is activated 4 sys_clk cycles after por_ext. handbook, full pagewidth mgt755 phase 1 rdy = 0 phase 2 rdy = 1 por vio_power lpo_clk sys_clk_req sys_clk osc por_ext fig.4 reset timing.
2001 jun 19 12 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.4 serial interface 6.4.1 3- wire s- bus the 3-wire s-bus at the radio side is a 32-bit serial interface which is used for control, tx/rx and channel information. the 32-bit definition is given in tables 4 and 5. bits 31 to 9 are static values and will not change dynamically, the value for these bits come from the static registers. only the trx and main divider fields will control the uaa3558 on a slot-by-slot basis. the trx and main divider information comes from the baseband controller serial interface channel word; see section 6.5.1. however, the baseband controller channel information needs a conversion to get the correct main divider information for the uaa3558. table 4 uaa3558 3-wire programming word table 5 uaa3558 3-wire programming word (continued) 6.4.2 jtag the jtag serial interface is used to control the PCF26100 and subsequently the radio. the PCF26100 must be the only slave on the jtag bus as the PCF26100 does not allow for multi-slave operation. the jtag interface protocol used is fully compliant with the standard set out in ieee std 1149.1-1990 . the following features are supported: 5-bit register address 8-bit data set instruction register read/write data register (note: some addresses have a separate read and write data register). the jtag interface allows for 2 ways of accessing a register. one is the communicate address and data, and the second one is for successive accesses to the same registers where only the data is communicated. this can, for example, be used for updating the channel information before every packet. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 test dpo bw adjust strc sdsn sdco ssqs ssth dmo tin 1514131211109876543210 tsw tamp ref1 ref0 txp1 txp0 pll trx main divider (n)
2001 jun 19 13 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.5 registers the registers that are controlled via the serial interface are shown in table 6. table 6 register map 6.5.1 c hannel programming the serial interface channel programming word is forwarded to the uaa3558 3-wire interface. the channel information cannot normally be used directly and needs a conversion to get the right number for the uaa3558. table 7 channel programming word table 8 description of channel programming word bits register type address (decimal) reset (hex) description s_en_start r/w 8 0c s_en start delay s_en_width r/w 9 c8 s_en width t_sw_start r/w 10 64 t_sw start delay slcctr_start r/w 11 0a slcctr start delay s_en_pulse_start r/w 12 02 s_en pulse start delay rssi_start r/w 13 64 rssi measurement position static_b15_9 r/w 14 24 uaa3558 serial word static values static_b23_16 r/w 15 12 uaa3558 serial word static values static_b31_24 r/w 16 00 uaa3558 serial word static values channel w 18 00 frequency channel number and tx/rx information rssi r 18 00 rssi xo-trim w 19 80 trim value for the system clock oscillator id r 19 a1 device identi?cation control r/w 22 00 system clock control pacontrol r/w 24 00 for external pa power control enable r/w 25 00 adapter control gfsk_dc_bias_start r/w 26 64 gfsk dc bias start delay gfsk_table r/w 28 00 gfsk look-up table values rxfreq w 30 61 rx channel conversion number txfreq w 31 60 tx channel conversion number address 76543210 18 (decimal) trx channel number (m) bit description 7 if trx = 0, then device in transmit mode. if trx = 1, then device in receive mode. 6 to 0 these 7 bits determine the channel number (m).
2001 jun 19 14 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.5.2 f requency channel conversion the conversion number is programmable for tx and rx. the function implemented is: tx frequency = 230 4+m+ txfreq; where m is the bt channel number and txfreq is programmable between 0 and 255 rx frequency = 230 4+m+ rxfreq; where m is the bt channel number and rxfreq is programmable between 0 and 255. table 9 frequency conversion word rxfreq table 10 frequency conversion word txfreq 6.5.3 s tatic values the uaa3558 bits 31 to 9 are static values and will not change dynamically. these values are programmed into the adapter via the serial interface. the static words are: static_b15_9, static_b23_16 and static_b31_24. table 11 static word static_b15_9 table 12 static word static_b23_16 table 13 static word static_b31_24 address 76543210 30 (decimal) rxfreq address 76543210 31 (decimal) txfreq address 76543210 14 (decimal) static value bits 15 to 9 not used address 76543210 15 (decimal) static value bits 23 to 16 address 76543210 16 (decimal) static value bits 31 to 24
2001 jun 19 15 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.5.4 t iming values the uaa3558 needs some timing signals which do not have a corresponding signal at the bluerf interface. these signals are generated internally in the adapter. the timing values for these will not change dynamically. these values are programmed into the adapter via the serial interface. the timing words are: s_en_start, s_en_width, t_sw_start, slcctr_start, s_en_pulse_start, rssi_start, and gfsk_dc_bias. table 14 timing control word s_en_start table 15 timing control word s_en_width table 16 timing control word t_sw_start table 17 timing control word slcctr_start table 18 timing control word s_en_pulse_start table 19 timing control word rssi_start table 20 timing control word gfsk_dc_bias address 76543210 8 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 9 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 10 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 11 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 12 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 13 (decimal) programmed timing value (resolution of 1-bit = 1 m s) address 76543210 26 (decimal) programmed timing value (resolution of 1-bit = 1 m s)
2001 jun 19 16 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 table 21 register values range and actual timings 6.5.5 rssi the rssi is read via the serial interface. the uaa3558 provides an analog rssi output. the interface logic converts the analog rssi value and stores the result in a serial interface register. the timing for converting the rssi is programmed using the rssi_start register. the rssi can only be measured starting 10 m s after the s_en falling edge. the rssi value can only be read from the serial interface register after the measurement has been completed, this is at the end of the packet. rssi measurements are only done in receive packets. table 22 rssi control word 6.5.6 t ransmit power control the transmit power can be controlled from a serial interface register. the 8-bit transmit power control word is used to control the pa dac. writing to the pa dac register will directly change the pa dac output. the pa control register should be written when the transmitter is not active. table 23 unidirectional jtag pa control word 6.5.7 gfsk table the values for the gfsk filter are stored in a 13-byte gfsk table. the gfsk table is accessed through a single control word which is used to store the data in the gfsk table on subsequent writes. to align the writing to the gfsk table a table address reset bit is available in the enable register. when the reset bit grst in the enable register is set to a logic 1 the gfsk table address will be reset and the next gfsk control word is written at location 0 in the gfsk table. every subsequent write to the gfsk control word will be stored at the next address in the gfsk table. if the last address is reached, subsequent writes will continue to effect the last address. the values for the gfsk table depend on the reference voltage on v dda . the t_gfsk signal should have a dc_bias of 1.2 v with a peak-to-peak swing of 1 v (amplitude = 0.5 v). for this the values for the gfsk table are calculated as shown in table 26. table 24 unidirectional jtag gfsk control word register range timing actual value unit s_en_start 0 < x < 256 t 2 and t 5 s_en_start + (0 to 1) m s s_en_width 0 < x < 256 t 6 s_en_width m s t_sw_start s_en_start < x < 256 t 17 t_sw_start + (0 to 1) m s slcctr_start 0 < x < 256 t 13 slcctr_start + 1 m s s_en_pulse_del 0 < x < 256 t 7 and t 8 s_en_pulse_del + (0 to 1) m s rssi_start 0 < x < 256 t 4 rssi_start m s gfsk_dc_bias 0 < x < 256 t 10 gfsk_dc_bias + (0 to 1) m s address 76543210 18 (decimal) rssi address 76543210 24 (decimal) pa power control gfsk_table 76543210 28 (decimal) gfsk table value
2001 jun 19 17 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 table 25 gfsk table reset values table 26 gfsk value calculation note 1. where and table address (decimal) reset value (hex) 12 91 11 90 10 8e 989 881 774 664 554 447 33e 23a 138 037 table address (decimal) calculation (1) value at 3 v decimal hex 0 59 3b 1 60 3c 2 62 3e 3 66 42 4 74 4a 5 87 57 6 102 66 7 117 75 8 130 82 9 138 8a 10 142 8e 11 144 90 12 145 91 dcbias a 96 C () + [] b dcbias a 94 C () + [] b dcbias a 90 C () + [] b dcbias a 80 C () + [] b dcbias a 62 C () + [] b dcbias a 34 C () + [] b dcbias a 0 () + [] b dcbias a 34 () + [] b dcbias a 62 () + [] b dcbias a 80 () + [] b dcbias a 90 () + [] b dcbias a 94 () + [] b dcbias a 96 () + [] b a amp 96 ----------- - = b 255 v dda ------------- - =
2001 jun 19 18 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.5.8 c ontrol r egister (control) the control register is used to control sys_clk in the adapter. table 27 control register table 28 description of control bits 6.5.9 e nable r egister (enable) the enable register is used to control functions in the adapter. table 29 enable register table 30 description of enable bits address 76543210 22 (decimal) ----- rdy -- bit symbol description 7to3 - these 5 bits are reserved and are not to be used. 2 rdy baseband ready. this bit is used to control the function of sys_clk_req. 1 - these 2 bits are reserved and are not to be used. 0 - address 76543210 25 (decimal) gfsk ?oat grst pa ?oat clk en test.2 test.1 test.0 - bit symbol description 7 gfsk ?oat controls the t_gfsk output outside tx packet. if gfsk = 0, then output tied to ground. if gfsk = 1, then output floats. 6 grst gfsk table address reset. writing a logic 1 will reset the gfsk table addressing. 5 pa ?oat controls the pa output outside tx packet. if pa ?oat = 0, then output tied to ground. if pa float = 1, then output floats. 4 clk en enables the 2.048 mhz clock on t_sw. if clk en = 0, then pin t_sw = t_sw. if clk en = 1, then pin t_sw = 2.048 mhz. 3 test.2 these 3 bits are used for test purposes. 2 test.1 1 test.0 0 - this bit is reserved and should not be used.
2001 jun 19 19 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 6.5.10 o scillator t rim r egister (xo_ trim ) the oscillator trim register is used to control the frequency of the 13 mhz oscillator. this is achieved by controlling the capacitive load on the xin and xout pins. table 31 oscillator trim register table 32 description of xo_trim bits 6.5.11 i dentification r egister (id) the identification register is used to identify the radio chip set from the baseband controller. this is a read only register. table 33 identi?cation register table 34 description of id bits 7 reference documents 1. uaa3558 bluetooth rf transceiver (philips data sheet). 2. pcf26002 bluetooth baseband controller (philips data sheet). 3. bluerf specification (arm ltd). address 76543210 19 (decimal) - xo_trim. 6 xo_trim. 5 xo_trim. 4 xo_trim. 3 xo_trim. 2 xo_trim. 1 xo_trim. 0 bit symbol description 7 - this bit is reserved and should not be used. 6 xo_trim.6 add 6 pf to xin and xout 5 xo_trim.5 add 3 pf to xin and xout 4 xo_trim.4 add 1.5 pf to xin and xout 3 xo_trim.3 add 0.75 pf to xin and xout 2 xo_trim.2 add 0.375 pf to xin and xout 1 xo_trim.1 add 0.1875 pf to xin and xout 0 xo_trim.0 add 0.09375 pf to xin and xout address 76543210 19 (decimal) id.7 id.6 id.5 id.4 id.3 id.2 id.1 id.0 bit symbol description 7 to 0 id.[7:0] these 8 bits determine the radio chip set identi?cation (value = a1h).
2001 jun 19 20 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 8 limiting values in accordance with the absolute maximum rating system (iec 60134). 9 dc characteristics notes 1. v dda should be supplied from a stable source. 2. standby power consumption is measured when sys_clk_req = 0. symbol description min. max. unit v dd core supply voltage v ss - 0.5 v ss + 3.6 v v dda analog supply voltage v ss - 0.5 v ss + 3.6 v v dd(i/o) i/o supply voltage v ss - 0.5 v ss + 3.6 v v dd(osc) oscillator supply voltage v ss - 0.5 v ss + 3.6 v v in input voltage v ss - 0.5 v dd + 0.3 v t stg storage temperature - 50 +150 c t oper operating temperature 0 +70 c symbol description min. typ. max. unit v dd core supply voltage 2.7 3.0 to 3.3 3.6 v v dda analog supply voltage for adc and dac; note 1 2.7 3.0 to 3.3 3.6 v v dd(i/o) i/o supply voltage 2.7 3.0 to 3.3 3.6 v v dd(osc) oscillator supply voltage 2.7 3.0 to 3.3 3.6 v p tx transmit power consumption - 22 - mw p rx receive power consumption - 14 - mw p stb standby power consumption; note 2 - 3 - mw v il low-level input voltage - 0.5 - +0.3v dd(i/o) v v ih high-level input voltage 0.7v dd(i/o) - v dd + 0.3 v v ol low-level output voltage -- 0.5 v v oh high-level output voltage 2.4 -- v i li input leakage current - 10 - +10 m a
2001 jun 19 21 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 10 ac characteristics symbol description min. typ. max. unit frequency f sys system clock frequency - 13 - mhz f clk(lp) low power clock frequency - 3.2 - mhz f s-bus 3-wire s-bus frequency - 6.5 - mhz f jtag jtag clock frequency 1 - 5 mhz f clock 2.048 mhz clock output - 2.048 - mhz d clock duty cycle 2.048 mhz clock output - 40/60 - % rssi adc res (adc) rssi adc resolution - 8 - bit le (adc) rssi adc linearity error - 0.5 0 +0.5 lsb e offset(adc) rssi adc offset error - 50 0 +50 mv e fs(adc) rssi adc full-scale error - 50 0 +50 mv v i(adc) rssi adc signal input voltage range 0 - v dda v z i(adc) rssi adc input impedance - 10 - m w gfsk dac res (dac) dac resolution - 8 - bit le dac(i) dac integral linearity error - 1.0 - +1.0 lsb le dac(diff) dac differential linearity error - 0.5 - +0.5 lsb e offset(dac) dac offset error - 50 - +50 mv e fs(dac) dac full-scale error - 50 - +50 mv v o(dac) dac signal output voltage range 0 - v dda v r l(dac) dac load resistance 600 -- lsb c l(dac) dac load capacitance -- 20 pf
2001 jun 19 22 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 11 applications b ook, full pagewidth mgt753 bpf v dda v dd v dd(i/o) v dd(osc) v cc v cc v cc v cc v cc v ssa v ss t_sw pacntl ubmode t_gfsk r_data slcctr v cc(reg) vrego vcoa vcob vregi txb txa txgnd t_on r_on rxa rxb rxgnd v cc(tx) reggnd v cc(syn) syngnd bufgnd vcognd gnd cp_tune rssi s_en s_data s_clk ref_clk t_gfsk r_data slcctr rssi s_en s_data s_clk refclk v ss(i/o) v ss(osc) PCF26100 uaa3558 v cc por vio_power lpo_clk px_on sys_clk_req sys_clk si_cdi si_cms si_clk synth_on tx_data si_cdo xout xin rx_data por_ext tx_clk 13 mhz bnpwr bpktctl bxtlen bmosi bnden bdclk bsen btxd bmiso brxd brclk v cc(rx) v cc v cc(buf) fig.5 application diagram bluerf jtag unidirectional rxmode 2.
2001 jun 19 23 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... mgt754 k, full pagewidth bpf v dda v dd v dd(i/o) v dd(osc) v cc v cc v cc v cc v cc v cc v ssa v ss t_sw pacntl ubmode t_gfsk r_data slcctr vrego vcoa vcob vregi v cc(buf) txb txa t_on r_on gnd cp_tune rssi s_en s_data s_clk ref_clk t_gfsk r_data slcctr rssi s_en s_data s_clk v ss(i/o) v ss(osc) PCF26100 vws2600x uaa3558 v cc por vio_power lpo_clk px_on sys_clk_req sys_clk si_cdi si_cms si_clk synth_on tx_data si_cdo xout xin rx_data por_ext tx_clk por lpo_clk 13 mhz px_on sys_clk_req sys_clk cdo cms clk synth_on tx_data cdi rx_data tx_clk v cc(reg) txgnd rxa rxb rxgnd v cc(tx) reggnd v cc(syn) syngnd bufgnd vcognd refclk v cc(rx) fig.6 application diagram vws2600x.
2001 jun 19 24 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 12 package outline 0.5 a 1 b a 2 unit d y e references outline version european projection issue date 00-10-10 iec jedec eiaj mm 1.12 0.28 0.16 0.84 0.76 5.1 4.9 y 1 5.1 4.9 0.37 0.27 0.12 dimensions (mm are the original dimensions) sot641-1 mo-211 e 0.15 0.1 e 1 3.5 v 0.1 w 0 2.5 5 mm scale sot641-1 tfbga48: plastic thin fine-pitch ball grid array package; 48 balls; body 5 x 5 x 0.8 mm a max. a a 2 a 1 detail x y y 1 c e e ? w b x d e c m a b c d e f h g 2468 1357 b a m va m vb e 1 e 1 ball a1 index area
2001 jun 19 25 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 13 soldering 13.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. 13.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 220 c for thick/large packages, and below 235 c for small/thin packages. 13.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 13.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2001 jun 19 26 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 13.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2001 jun 19 27 philips semiconductors preliminary speci?cation bluetooth adapter ic PCF26100 14 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. data sheet status (1) product status (2) definitions objective data development this data sheet contains data from the objective specification for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. preliminary data quali?cation this data sheet contains data from the preliminary specification. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. product data production this data sheet contains data from the product specification. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. changes will be communicated according to the customer product/process change noti?cation (cpcn) procedure snw-sq-650a. 15 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 16 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2001 72 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, marketing communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 7 - 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